zip 压缩文件包含以下子文件
1: 7za.exe
2: Altium Designer 10 /
3: Altium Designer 10 / Builds /
4: Altium Designer 10 / Builds / 27295 /
5: Altium Designer 10 / Builds / 27295 / Device_SEGGER_JLink /
6: Altium Designer 10 / Builds / 27295 / Device_SEGGER_JLink / Device_SEGGER_JLink.ModuleBuild
7: Altium Designer 10 / Builds / 27295 / Device_SEGGER_JLink / zip /
8: Altium Designer 10 / Builds / 27295 / Device_SEGGER_JLink / zip / Device_SEGGER_JLink.zip
9: Altium Designer 10 / Builds / 27333 /
10: Altium Designer 10 / Builds / 27333 / Aldec Simulator /
11: Altium Designer 10 / Builds / 27333 / Aldec Simulator / Aldec Simulator.ModuleBuild
12: Altium Designer 10 / Builds / 27333 / Aldec Simulator / zip /
13: Altium Designer 10 / Builds / 27333 / Aldec Simulator / zip / Aldec Simulator.zip
14: Altium Designer 10 / Builds / 27333 / AssyTestpoint /
15: Altium Designer 10 / Builds / 27333 / AssyTestpoint / AssyTestpoint.ModuleBuild
16: Altium Designer 10 / Builds / 27333 / AssyTestpoint / zip /
17: Altium Designer 10 / Builds / 27333 / AssyTestpoint / zip / AssyTestpoint.zip
18: Altium Designer 10 / Builds / 27333 / Base_FPGAFirmware /
19: Altium Designer 10 / Builds / 27333 / Base_FPGAFirmware / Base_FPGAFirmware.ModuleBuild
20: Altium Designer 10 / Builds / 27333 / Base_FPGAFirmware / zip /
21: Altium Designer 10 / Builds / 27333 / Base_FPGAFirmware / zip / Base_FPGAFirmware.zip
22: Altium Designer 10 / Builds / 27333 / BoardSupport_Evaluation /
23: Altium Designer 10 / Builds / 27333 / BoardSupport_Evaluation / BoardSupport_Evaluation.ModuleBuild
24: Altium Designer 10 / Builds / 27333 / BoardSupport_Evaluation / zip /
25: Altium Designer 10 / Builds / 27333 / BoardSupport_Evaluation / zip / BoardSupport_Evaluation.zip
26: Altium Designer 10 / Builds / 27333 / BoardSupport_NB /
27: Altium Designer 10 / Builds / 27333 / BoardSupport_NB / BoardSupport_NB.ModuleBuild
28: Altium Designer 10 / Builds / 27333 / BoardSupport_NB / zip /
29: Altium Designer 10 / Builds / 27333 / BoardSupport_NB / zip / BoardSupport_NB.zip
30: Altium Designer 10 / Builds / 27333 / BoardSupport_NB1 /
31: Altium Designer 10 / Builds / 27333 / BoardSupport_NB1 / BoardSupport_NB1.ModuleBuild
32: Altium Designer 10 / Builds / 27333 / BoardSupport_NB1 / zip /
33: Altium Designer 10 / Builds / 27333 / BoardSupport_NB1 / zip / BoardSupport_NB1.zip
34: Altium Designer 10 / Builds / 27333 / BoardSupport_SpiritLevel /
35: Altium Designer 10 / Builds / 27333 / BoardSupport_SpiritLevel / BoardSupport_SpiritLevel.ModuleBuild
36: Altium Designer 10 / Builds / 27333 / BoardSupport_SpiritLevel / zip /
37: Altium Designer 10 / Builds / 27333 / BoardSupport_SpiritLevel / zip / BoardSupport_SpiritLevel.zip
38: Altium Designer 10 / Builds / 27333 / BOM /
39: Altium Designer 10 / Builds / 27333 / BOM / BOM.ModuleBuild
40: Altium Designer 10 / Builds / 27333 / BOM / zip /
41: Altium Designer 10 / Builds / 27333 / BOM / zip / BOM.zip
42: Altium Designer 10 / Builds / 27333 / CppPrint /
43: Altium Designer 10 / Builds / 27333 / CppPrint / CppPrint.ModuleBuild
44: Altium Designer 10 / Builds / 27333 / CppPrint / zip /
45: Altium Designer 10 / Builds / 27333 / CppPrint / zip / CppPrint.zip
46: Altium Designer 10 / Builds / 27333 / CPrint /
47: Altium Designer 10 / Builds / 27333 / CPrint / CPrint.ModuleBuild
48: Altium Designer 10 / Builds / 27333 / CPrint / zip /
49: Altium Designer 10 / Builds / 27333 / CPrint / zip / CPrint.zip
50: Altium Designer 10 / Builds / 27333 / Device_Arria2GX /
51: Altium Designer 10 / Builds / 27333 / Device_Arria2GX / Device_Arria2GX.ModuleBuild
52: Altium Designer 10 / Builds / 27333 / Device_Arria2GX / zip /
53: Altium Designer 10 / Builds / 27333 / Device_Arria2GX / zip / Device_Arria2GX.zip
54: Altium Designer 10 / Builds / 27333 / FPGALibraries /
55: Altium Designer 10 / Builds / 27333 / FPGALibraries / FPGALibraries.ModuleBuild
56: Altium Designer 10 / Builds / 27333 / FPGALibraries / zip /
57: Altium Designer 10 / Builds / 27333 / FPGALibraries / zip / FPGALibraries.zip
58: Altium Designer 10 / Builds / 27333 / HDLSim_ActelVerilog /
59: Altium Designer 10 / Builds / 27333 / HDLSim_ActelVerilog / HDLSim_ActelVerilog.ModuleBuild
60: Altium Designer 10 / Builds / 27333 / HDLSim_ActelVerilog / zip /
61: Altium Designer 10 / Builds / 27333 / HDLSim_ActelVerilog / zip / HDLSim_ActelVerilog.zip
62: Altium Designer 10 / Builds / 27333 / HDLSim_ActelVHDL /
63: Altium Designer 10 / Builds / 27333 / HDLSim_ActelVHDL / HDLSim_ActelVHDL.ModuleBuild
64: Altium Designer 10 / Builds / 27333 / HDLSim_ActelVHDL / zip /
65: Altium Designer 10 / Builds / 27333 / HDLSim_ActelVHDL / zip / HDLSim_ActelVHDL.zip
66: Altium Designer 10 / Builds / 27333 / HDLSim_AlteraVerilog /
67: Altium Designer 10 / Builds / 27333 / HDLSim_AlteraVerilog / HDLSim_AlteraVerilog.ModuleBuild
68: Altium Designer 10 / Builds / 27333 / HDLSim_AlteraVerilog / zip /
69: Altium Designer 10 / Builds / 27333 / HDLSim_AlteraVerilog / zip / HDLSim_AlteraVerilog.zip
70: Altium Designer 10 / Builds / 27333 / HDLSim_AlteraVHDL /
71: Altium Designer 10 / Builds / 27333 / HDLSim_AlteraVHDL / HDLSim_AlteraVHDL.ModuleBuild
72: Altium Designer 10 / Builds / 27333 / HDLSim_AlteraVHDL / zip /
73: Altium Designer 10 / Builds / 27333 / HDLSim_AlteraVHDL / zip / HDLSim_AlteraVHDL.zip
74: Altium Designer 10 / Builds / 27333 / HDLSim_LatticeVerilog /
75: Altium Designer 10 / Builds / 27333 / HDLSim_LatticeVerilog / HDLSim_LatticeVerilog.ModuleBuild
76: Altium Designer 10 / Builds / 27333 / HDLSim_LatticeVerilog / zip /
77: Altium Designer 10 / Builds / 27333 / HDLSim_LatticeVerilog / zip / HDLSim_LatticeVerilog.zip
78: Altium Designer 10 / Builds / 27333 / HDLSim_LatticeVHDL /
79: Altium Designer 10 / Builds / 27333 / HDLSim_LatticeVHDL / HDLSim_LatticeVHDL.ModuleBuild
80: Altium Designer 10 / Builds / 27333 / HDLSim_LatticeVHDL / zip /
81: Altium Designer 10 / Builds / 27333 / HDLSim_LatticeVHDL / zip / HDLSim_LatticeVHDL.zip
82: Altium Designer 10 / Builds / 27333 / HDLSim_XilinxVerilog /
83: Altium Designer 10 / Builds / 27333 / HDLSim_XilinxVerilog / HDLSim_XilinxVerilog.ModuleBuild
84: Altium Designer 10 / Builds / 27333 / HDLSim_XilinxVerilog / zip /
85: Altium Designer 10 / Builds / 27333 / HDLSim_XilinxVerilog / zip / HDLSim_XilinxVerilog.zip
86: Altium Designer 10 / Builds / 27333 / HDLSim_XilinxVHDL /
87: Altium Designer 10 / Builds / 27333 / HDLSim_XilinxVHDL / HDLSim_XilinxVHDL.ModuleBuild
88: Altium Designer 10 / Builds / 27333 / HDLSim_XilinxVHDL / zip /
89: Altium Designer 10 / Builds / 27333 / HDLSim_XilinxVHDL / zip / HDLSim_XilinxVHDL.zip
90: Altium Designer 10 / Builds / 27333 / HeaderPrint /
91: Altium Designer 10 / Builds / 27333 / HeaderPrint / HeaderPrint.ModuleBuild
92: Altium Designer 10 / Builds / 27333 / HeaderPrint / zip /
93: Altium Designer 10 / Builds / 27333 / HeaderPrint / zip / HeaderPrint.zip
94: Altium Designer 10 / Builds / 27333 / Help_Embedded /
95: Altium Designer 10 / Builds / 27333 / Help_Embedded / Help_Embedded.ModuleBuild
96: Altium Designer 10 / Builds / 27333 / Help_Embedded / zip /
97: Altium Designer 10 / Builds / 27333 / Help_Embedded / zip / Help_Embedded.zip
98: Altium Designer 10 / Builds / 27333 / Help_FPGA /
99: Altium Designer 10 / Builds / 27333 / Help_FPGA / Help_FPGA.ModuleBuild
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